This paper investigates non-determinism and overcounting in x86_64 hardware performance counters, finding that supposedly exact events like retired instructions show run-to-run variation. The primary culprit is the iret interrupt return instruction being counted as a userspace event despite executing in kernel space. ARM, IA64, POWER, and SPARC platforms showed more deterministic behavior, but workarounds for x86_64 are limited.
Background
Hardware Performance Monitoring Units (PMUs) are critical tools for system optimization and debugging, but their reliability on x86 architecture has been questioned. This work by Vance Weaver builds on decades of x86 performance analysis research.
- Source
- Lobsters
- Published
- Nov 1, 2026 at 03:55 PM
- Score
- 7.0 / 10